hw_uart.h 23 KB

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  1. //*****************************************************************************
  2. //
  3. // Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
  4. //
  5. //
  6. // Redistribution and use in source and binary forms, with or without
  7. // modification, are permitted provided that the following conditions
  8. // are met:
  9. //
  10. // Redistributions of source code must retain the above copyright
  11. // notice, this list of conditions and the following disclaimer.
  12. //
  13. // Redistributions in binary form must reproduce the above copyright
  14. // notice, this list of conditions and the following disclaimer in the
  15. // documentation and/or other materials provided with the
  16. // distribution.
  17. //
  18. // Neither the name of Texas Instruments Incorporated nor the names of
  19. // its contributors may be used to endorse or promote products derived
  20. // from this software without specific prior written permission.
  21. //
  22. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  23. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  24. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  25. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  26. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  27. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  28. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  29. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  30. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  32. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. //
  34. //*****************************************************************************
  35. #ifndef __HW_UART_H__
  36. #define __HW_UART_H__
  37. //*****************************************************************************
  38. //
  39. // The following are defines for the UART register offsets.
  40. //
  41. //*****************************************************************************
  42. #define UART_O_DR 0x00000000
  43. #define UART_O_RSR 0x00000004
  44. #define UART_O_ECR 0x00000004
  45. #define UART_O_FR 0x00000018
  46. #define UART_O_ILPR 0x00000020
  47. #define UART_O_IBRD 0x00000024
  48. #define UART_O_FBRD 0x00000028
  49. #define UART_O_LCRH 0x0000002C
  50. #define UART_O_CTL 0x00000030
  51. #define UART_O_IFLS 0x00000034
  52. #define UART_O_IM 0x00000038
  53. #define UART_O_RIS 0x0000003C
  54. #define UART_O_MIS 0x00000040
  55. #define UART_O_ICR 0x00000044
  56. #define UART_O_DMACTL 0x00000048
  57. #define UART_O_LCTL 0x00000090
  58. #define UART_O_LSS 0x00000094
  59. #define UART_O_LTIM 0x00000098
  60. #define UART_O_9BITADDR 0x000000A4
  61. #define UART_O_9BITAMASK 0x000000A8
  62. #define UART_O_PP 0x00000FC0
  63. #define UART_O_CC 0x00000FC8
  64. //******************************************************************************
  65. //
  66. // The following are defines for the bit fields in the UART_O_DR register.
  67. //
  68. //******************************************************************************
  69. #define UART_DR_OE 0x00000800 // UART Overrun Error
  70. #define UART_DR_BE 0x00000400 // UART Break Error
  71. #define UART_DR_PE 0x00000200 // UART Parity Error
  72. #define UART_DR_FE 0x00000100 // UART Framing Error
  73. #define UART_DR_DATA_M 0x000000FF // Data Transmitted or Received
  74. #define UART_DR_DATA_S 0
  75. //******************************************************************************
  76. //
  77. // The following are defines for the bit fields in the UART_O_RSR register.
  78. //
  79. //******************************************************************************
  80. #define UART_RSR_OE 0x00000008 // UART Overrun Error
  81. #define UART_RSR_BE 0x00000004 // UART Break Error
  82. #define UART_RSR_PE 0x00000002 // UART Parity Error
  83. #define UART_RSR_FE 0x00000001 // UART Framing Error
  84. //******************************************************************************
  85. //
  86. // The following are defines for the bit fields in the UART_O_ECR register.
  87. //
  88. //******************************************************************************
  89. #define UART_ECR_DATA_M 0x000000FF // Error Clear
  90. #define UART_ECR_DATA_S 0
  91. //******************************************************************************
  92. //
  93. // The following are defines for the bit fields in the UART_O_FR register.
  94. //
  95. //******************************************************************************
  96. #define UART_FR_RI 0x00000100 // Ring Indicator
  97. #define UART_FR_TXFE 0x00000080 // UART Transmit FIFO Empty
  98. #define UART_FR_RXFF 0x00000040 // UART Receive FIFO Full
  99. #define UART_FR_TXFF 0x00000020 // UART Transmit FIFO Full
  100. #define UART_FR_RXFE 0x00000010 // UART Receive FIFO Empty
  101. #define UART_FR_BUSY 0x00000008 // UART Busy
  102. #define UART_FR_DCD 0x00000004 // Data Carrier Detect
  103. #define UART_FR_DSR 0x00000002 // Data Set Ready
  104. #define UART_FR_CTS 0x00000001 // Clear To Send
  105. //******************************************************************************
  106. //
  107. // The following are defines for the bit fields in the UART_O_ILPR register.
  108. //
  109. //******************************************************************************
  110. #define UART_ILPR_ILPDVSR_M 0x000000FF // IrDA Low-Power Divisor
  111. #define UART_ILPR_ILPDVSR_S 0
  112. //******************************************************************************
  113. //
  114. // The following are defines for the bit fields in the UART_O_IBRD register.
  115. //
  116. //******************************************************************************
  117. #define UART_IBRD_DIVINT_M 0x0000FFFF // Integer Baud-Rate Divisor
  118. #define UART_IBRD_DIVINT_S 0
  119. //******************************************************************************
  120. //
  121. // The following are defines for the bit fields in the UART_O_FBRD register.
  122. //
  123. //******************************************************************************
  124. #define UART_FBRD_DIVFRAC_M 0x0000003F // Fractional Baud-Rate Divisor
  125. #define UART_FBRD_DIVFRAC_S 0
  126. //******************************************************************************
  127. //
  128. // The following are defines for the bit fields in the UART_O_LCRH register.
  129. //
  130. //******************************************************************************
  131. #define UART_LCRH_SPS 0x00000080 // UART Stick Parity Select
  132. #define UART_LCRH_WLEN_M 0x00000060 // UART Word Length 0x00000000 :
  133. // UART_LCRH_WLEN_5 : 5 bits
  134. // (default) 0x00000020 :
  135. // UART_LCRH_WLEN_6 : 6 bits
  136. // 0x00000040 : UART_LCRH_WLEN_7 : 7
  137. // bits 0x00000060 :
  138. // UART_LCRH_WLEN_8 : 8 bits
  139. #define UART_LCRH_WLEN_S 5
  140. #define UART_LCRH_FEN 0x00000010 // UART Enable FIFOs
  141. #define UART_LCRH_STP2 0x00000008 // UART Two Stop Bits Select
  142. #define UART_LCRH_EPS 0x00000004 // UART Even Parity Select
  143. #define UART_LCRH_PEN 0x00000002 // UART Parity Enable
  144. #define UART_LCRH_BRK 0x00000001 // UART Send Break
  145. #define UART_LCRH_WLEN_M 0x00000060 // UART Word Length
  146. #define UART_LCRH_WLEN_5 0x00000000 // 5 bits (default)
  147. #define UART_LCRH_WLEN_6 0x00000020 // 6 bits
  148. #define UART_LCRH_WLEN_7 0x00000040 // 7 bits
  149. #define UART_LCRH_WLEN_8 0x00000060 // 8 bits
  150. //******************************************************************************
  151. //
  152. // The following are defines for the bit fields in the UART_O_CTL register.
  153. //
  154. //******************************************************************************
  155. #define UART_CTL_CTSEN 0x00008000 // Enable Clear To Send
  156. #define UART_CTL_RTSEN 0x00004000 // Enable Request to Send
  157. #define UART_CTL_RI 0x00002000 // Ring Indicator
  158. #define UART_CTL_DCD 0x00001000 // Data Carrier Detect
  159. #define UART_CTL_RTS 0x00000800 // Request to Send
  160. #define UART_CTL_DTR 0x00000400 // Data Terminal Ready
  161. #define UART_CTL_RXE 0x00000200 // UART Receive Enable
  162. #define UART_CTL_TXE 0x00000100 // UART Transmit Enable
  163. #define UART_CTL_LBE 0x00000080 // UART Loop Back Enable
  164. #define UART_CTL_LIN 0x00000040 // LIN Mode Enable
  165. #define UART_CTL_HSE 0x00000020 // High-Speed Enable
  166. #define UART_CTL_EOT 0x00000010 // End of Transmission
  167. #define UART_CTL_SMART 0x00000008 // ISO 7816 Smart Card Support
  168. #define UART_CTL_SIRLP 0x00000004 // UART SIR Low-Power Mode
  169. #define UART_CTL_SIREN 0x00000002 // UART SIR Enable
  170. #define UART_CTL_UARTEN 0x00000001 // UART Enable
  171. //******************************************************************************
  172. //
  173. // The following are defines for the bit fields in the UART_O_IFLS register.
  174. //
  175. //******************************************************************************
  176. #define UART_IFLS_RX_M 0x00000038 // UART Receive Interrupt FIFO
  177. // Level Select
  178. #define UART_IFLS_RX_S 3
  179. #define UART_IFLS_TX_M 0x00000007 // UART Transmit Interrupt FIFO
  180. // Level Select
  181. #define UART_IFLS_TX_S 0
  182. //******************************************************************************
  183. //
  184. // The following are defines for the bit fields in the UART_O_IM register.
  185. //
  186. //******************************************************************************
  187. #define UART_IM_DMATXIM 0x00020000 // Transmit DMA Interrupt Mask
  188. #define UART_IM_DMARXIM 0x00010000 // Receive DMA Interrupt Mask
  189. #define UART_IM_LME5IM 0x00008000 // LIN Mode Edge 5 Interrupt Mask
  190. #define UART_IM_LME1IM 0x00004000 // LIN Mode Edge 1 Interrupt Mask
  191. #define UART_IM_LMSBIM 0x00002000 // LIN Mode Sync Break Interrupt
  192. // Mask
  193. #define UART_IM_9BITIM 0x00001000 // 9-Bit Mode Interrupt Mask
  194. #define UART_IM_EOTIM 0x00000800 // End of Transmission Interrupt
  195. // Mask
  196. #define UART_IM_OEIM 0x00000400 // UART Overrun Error Interrupt
  197. // Mask
  198. #define UART_IM_BEIM 0x00000200 // UART Break Error Interrupt Mask
  199. #define UART_IM_PEIM 0x00000100 // UART Parity Error Interrupt Mask
  200. #define UART_IM_FEIM 0x00000080 // UART Framing Error Interrupt
  201. // Mask
  202. #define UART_IM_RTIM 0x00000040 // UART Receive Time-Out Interrupt
  203. // Mask
  204. #define UART_IM_TXIM 0x00000020 // UART Transmit Interrupt Mask
  205. #define UART_IM_RXIM 0x00000010 // UART Receive Interrupt Mask
  206. #define UART_IM_DSRMIM 0x00000008 // UART Data Set Ready Modem
  207. // Interrupt Mask
  208. #define UART_IM_DCDMIM 0x00000004 // UART Data Carrier Detect Modem
  209. // Interrupt Mask
  210. #define UART_IM_CTSMIM 0x00000002 // UART Clear to Send Modem
  211. // Interrupt Mask
  212. #define UART_IM_RIMIM 0x00000001 // UART Ring Indicator Modem
  213. // Interrupt Mask
  214. //******************************************************************************
  215. //
  216. // The following are defines for the bit fields in the UART_O_RIS register.
  217. //
  218. //******************************************************************************
  219. #define UART_RIS_DMATXRIS 0x00020000 // Transmit DMA Raw Interrupt
  220. // Status
  221. #define UART_RIS_DMARXRIS 0x00010000 // Receive DMA Raw Interrupt Status
  222. #define UART_RIS_LME5RIS 0x00008000 // LIN Mode Edge 5 Raw Interrupt
  223. // Status
  224. #define UART_RIS_LME1RIS 0x00004000 // LIN Mode Edge 1 Raw Interrupt
  225. // Status
  226. #define UART_RIS_LMSBRIS 0x00002000 // LIN Mode Sync Break Raw
  227. // Interrupt Status
  228. #define UART_RIS_9BITRIS 0x00001000 // 9-Bit Mode Raw Interrupt Status
  229. #define UART_RIS_EOTRIS 0x00000800 // End of Transmission Raw
  230. // Interrupt Status
  231. #define UART_RIS_OERIS 0x00000400 // UART Overrun Error Raw Interrupt
  232. // Status
  233. #define UART_RIS_BERIS 0x00000200 // UART Break Error Raw Interrupt
  234. // Status
  235. #define UART_RIS_PERIS 0x00000100 // UART Parity Error Raw Interrupt
  236. // Status
  237. #define UART_RIS_FERIS 0x00000080 // UART Framing Error Raw Interrupt
  238. // Status
  239. #define UART_RIS_RTRIS 0x00000040 // UART Receive Time-Out Raw
  240. // Interrupt Status
  241. #define UART_RIS_TXRIS 0x00000020 // UART Transmit Raw Interrupt
  242. // Status
  243. #define UART_RIS_RXRIS 0x00000010 // UART Receive Raw Interrupt
  244. // Status
  245. #define UART_RIS_DSRRIS 0x00000008 // UART Data Set Ready Modem Raw
  246. // Interrupt Status
  247. #define UART_RIS_DCDRIS 0x00000004 // UART Data Carrier Detect Modem
  248. // Raw Interrupt Status
  249. #define UART_RIS_CTSRIS 0x00000002 // UART Clear to Send Modem Raw
  250. // Interrupt Status
  251. #define UART_RIS_RIRIS 0x00000001 // UART Ring Indicator Modem Raw
  252. // Interrupt Status
  253. //******************************************************************************
  254. //
  255. // The following are defines for the bit fields in the UART_O_MIS register.
  256. //
  257. //******************************************************************************
  258. #define UART_MIS_DMATXMIS 0x00020000 // Transmit DMA Masked Interrupt
  259. // Status
  260. #define UART_MIS_DMARXMIS 0x00010000 // Receive DMA Masked Interrupt
  261. // Status
  262. #define UART_MIS_LME5MIS 0x00008000 // LIN Mode Edge 5 Masked Interrupt
  263. // Status
  264. #define UART_MIS_LME1MIS 0x00004000 // LIN Mode Edge 1 Masked Interrupt
  265. // Status
  266. #define UART_MIS_LMSBMIS 0x00002000 // LIN Mode Sync Break Masked
  267. // Interrupt Status
  268. #define UART_MIS_9BITMIS 0x00001000 // 9-Bit Mode Masked Interrupt
  269. // Status
  270. #define UART_MIS_EOTMIS 0x00000800 // End of Transmission Masked
  271. // Interrupt Status
  272. #define UART_MIS_OEMIS 0x00000400 // UART Overrun Error Masked
  273. // Interrupt Status
  274. #define UART_MIS_BEMIS 0x00000200 // UART Break Error Masked
  275. // Interrupt Status
  276. #define UART_MIS_PEMIS 0x00000100 // UART Parity Error Masked
  277. // Interrupt Status
  278. #define UART_MIS_FEMIS 0x00000080 // UART Framing Error Masked
  279. // Interrupt Status
  280. #define UART_MIS_RTMIS 0x00000040 // UART Receive Time-Out Masked
  281. // Interrupt Status
  282. #define UART_MIS_TXMIS 0x00000020 // UART Transmit Masked Interrupt
  283. // Status
  284. #define UART_MIS_RXMIS 0x00000010 // UART Receive Masked Interrupt
  285. // Status
  286. #define UART_MIS_DSRMIS 0x00000008 // UART Data Set Ready Modem Masked
  287. // Interrupt Status
  288. #define UART_MIS_DCDMIS 0x00000004 // UART Data Carrier Detect Modem
  289. // Masked Interrupt Status
  290. #define UART_MIS_CTSMIS 0x00000002 // UART Clear to Send Modem Masked
  291. // Interrupt Status
  292. #define UART_MIS_RIMIS 0x00000001 // UART Ring Indicator Modem Masked
  293. // Interrupt Status
  294. //******************************************************************************
  295. //
  296. // The following are defines for the bit fields in the UART_O_ICR register.
  297. //
  298. //******************************************************************************
  299. #define UART_ICR_DMATXIC 0x00020000 // Transmit DMA Interrupt Clear
  300. #define UART_ICR_DMARXIC 0x00010000 // Receive DMA Interrupt Clear
  301. #define UART_ICR_LME5MIC 0x00008000 // LIN Mode Edge 5 Interrupt Clear
  302. #define UART_ICR_LME1MIC 0x00004000 // LIN Mode Edge 1 Interrupt Clear
  303. #define UART_ICR_LMSBMIC 0x00002000 // LIN Mode Sync Break Interrupt
  304. // Clear
  305. #define UART_ICR_9BITIC 0x00001000 // 9-Bit Mode Interrupt Clear
  306. #define UART_ICR_EOTIC 0x00000800 // End of Transmission Interrupt
  307. // Clear
  308. #define UART_ICR_OEIC 0x00000400 // Overrun Error Interrupt Clear
  309. #define UART_ICR_BEIC 0x00000200 // Break Error Interrupt Clear
  310. #define UART_ICR_PEIC 0x00000100 // Parity Error Interrupt Clear
  311. #define UART_ICR_FEIC 0x00000080 // Framing Error Interrupt Clear
  312. #define UART_ICR_RTIC 0x00000040 // Receive Time-Out Interrupt Clear
  313. #define UART_ICR_TXIC 0x00000020 // Transmit Interrupt Clear
  314. #define UART_ICR_RXIC 0x00000010 // Receive Interrupt Clear
  315. #define UART_ICR_DSRMIC 0x00000008 // UART Data Set Ready Modem
  316. // Interrupt Clear
  317. #define UART_ICR_DCDMIC 0x00000004 // UART Data Carrier Detect Modem
  318. // Interrupt Clear
  319. #define UART_ICR_CTSMIC 0x00000002 // UART Clear to Send Modem
  320. // Interrupt Clear
  321. #define UART_ICR_RIMIC 0x00000001 // UART Ring Indicator Modem
  322. // Interrupt Clear
  323. //******************************************************************************
  324. //
  325. // The following are defines for the bit fields in the UART_O_DMACTL register.
  326. //
  327. //******************************************************************************
  328. #define UART_DMACTL_DMAERR 0x00000004 // DMA on Error
  329. #define UART_DMACTL_TXDMAE 0x00000002 // Transmit DMA Enable
  330. #define UART_DMACTL_RXDMAE 0x00000001 // Receive DMA Enable
  331. //******************************************************************************
  332. //
  333. // The following are defines for the bit fields in the UART_O_LCTL register.
  334. //
  335. //******************************************************************************
  336. #define UART_LCTL_BLEN_M 0x00000030 // Sync Break Length 0x00000000 :
  337. // UART_LCTL_BLEN_13T : Sync break
  338. // length is 13T bits (default)
  339. // 0x00000010 : UART_LCTL_BLEN_14T :
  340. // Sync break length is 14T bits
  341. // 0x00000020 : UART_LCTL_BLEN_15T :
  342. // Sync break length is 15T bits
  343. // 0x00000030 : UART_LCTL_BLEN_16T :
  344. // Sync break length is 16T bits
  345. #define UART_LCTL_BLEN_S 4
  346. #define UART_LCTL_MASTER 0x00000001 // LIN Master Enable
  347. //******************************************************************************
  348. //
  349. // The following are defines for the bit fields in the UART_O_LSS register.
  350. //
  351. //******************************************************************************
  352. #define UART_LSS_TSS_M 0x0000FFFF // Timer Snap Shot
  353. #define UART_LSS_TSS_S 0
  354. //******************************************************************************
  355. //
  356. // The following are defines for the bit fields in the UART_O_LTIM register.
  357. //
  358. //******************************************************************************
  359. #define UART_LTIM_TIMER_M 0x0000FFFF // Timer Value
  360. #define UART_LTIM_TIMER_S 0
  361. //******************************************************************************
  362. //
  363. // The following are defines for the bit fields in the
  364. // UART_O_9BITADDR register.
  365. //
  366. //******************************************************************************
  367. #define UART_9BITADDR_9BITEN \
  368. 0x00008000 // Enable 9-Bit Mode
  369. #define UART_9BITADDR_ADDR_M \
  370. 0x000000FF // Self Address for 9-Bit Mode
  371. #define UART_9BITADDR_ADDR_S 0
  372. //******************************************************************************
  373. //
  374. // The following are defines for the bit fields in the
  375. // UART_O_9BITAMASK register.
  376. //
  377. //******************************************************************************
  378. #define UART_9BITAMASK_RANGE_M \
  379. 0x0000FF00 // Self Address Range for 9-Bit
  380. // Mode
  381. #define UART_9BITAMASK_RANGE_S 8
  382. #define UART_9BITAMASK_MASK_M \
  383. 0x000000FF // Self Address Mask for 9-Bit Mode
  384. #define UART_9BITAMASK_MASK_S 0
  385. //******************************************************************************
  386. //
  387. // The following are defines for the bit fields in the UART_O_PP register.
  388. //
  389. //******************************************************************************
  390. #define UART_PP_MSE 0x00000008 // Modem Support Extended
  391. #define UART_PP_MS 0x00000004 // Modem Support
  392. #define UART_PP_NB 0x00000002 // 9-Bit Support
  393. #define UART_PP_SC 0x00000001 // Smart Card Support
  394. //******************************************************************************
  395. //
  396. // The following are defines for the bit fields in the UART_O_CC register.
  397. //
  398. //******************************************************************************
  399. #define UART_CC_CS_M 0x0000000F // UART Baud Clock Source
  400. // 0x00000005 : UART_CC_CS_PIOSC :
  401. // PIOSC 0x00000000 :
  402. // UART_CC_CS_SYSCLK : The system
  403. // clock (default)
  404. #define UART_CC_CS_S 0
  405. #endif // __HW_UART_H__