hw_memmap.h 3.7 KB

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  1. //*****************************************************************************
  2. //
  3. // Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
  4. //
  5. //
  6. // Redistribution and use in source and binary forms, with or without
  7. // modification, are permitted provided that the following conditions
  8. // are met:
  9. //
  10. // Redistributions of source code must retain the above copyright
  11. // notice, this list of conditions and the following disclaimer.
  12. //
  13. // Redistributions in binary form must reproduce the above copyright
  14. // notice, this list of conditions and the following disclaimer in the
  15. // documentation and/or other materials provided with the
  16. // distribution.
  17. //
  18. // Neither the name of Texas Instruments Incorporated nor the names of
  19. // its contributors may be used to endorse or promote products derived
  20. // from this software without specific prior written permission.
  21. //
  22. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  23. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  24. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  25. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  26. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  27. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  28. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  29. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  30. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  32. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. //
  34. //*****************************************************************************
  35. #ifndef __HW_MEMMAP_H__
  36. #define __HW_MEMMAP_H__
  37. //*****************************************************************************
  38. //
  39. // The following are defines for the base address of the memories and
  40. // peripherals on the slave_1 interface.
  41. //
  42. //*****************************************************************************
  43. #define FLASH_BASE 0x01000000
  44. #define SRAM_BASE 0x20000000
  45. #define WDT_BASE 0x40000000
  46. #define GPIOA0_BASE 0x40004000
  47. #define GPIOA1_BASE 0x40005000
  48. #define GPIOA2_BASE 0x40006000
  49. #define GPIOA3_BASE 0x40007000
  50. #define GPIOA4_BASE 0x40024000
  51. #define UARTA0_BASE 0x4000C000
  52. #define UARTA1_BASE 0x4000D000
  53. #define I2CA0_BASE 0x40020000
  54. #define TIMERA0_BASE 0x40030000
  55. #define TIMERA1_BASE 0x40031000
  56. #define TIMERA2_BASE 0x40032000
  57. #define TIMERA3_BASE 0x40033000
  58. #define STACKDIE_CTRL_BASE 0x400F5000
  59. #define COMMON_REG_BASE 0x400F7000
  60. #define FLASH_CONTROL_BASE 0x400FD000
  61. #define SYSTEM_CONTROL_BASE 0x400FE000
  62. #define UDMA_BASE 0x400FF000
  63. #define SDHOST_BASE 0x44010000
  64. #define CAMERA_BASE 0x44018000
  65. #define I2S_BASE 0x4401C000
  66. #define SSPI_BASE 0x44020000
  67. #define GSPI_BASE 0x44021000
  68. #define LSPI_BASE 0x44022000
  69. #define ARCM_BASE 0x44025000
  70. #define APPS_CONFIG_BASE 0x44026000
  71. #define GPRCM_BASE 0x4402D000
  72. #define OCP_SHARED_BASE 0x4402E000
  73. #define ADC_BASE 0x4402E800
  74. #define HIB1P2_BASE 0x4402F000
  75. #define HIB3P3_BASE 0x4402F800
  76. #define DTHE_BASE 0x44030000
  77. #define SHAMD5_BASE 0x44035000
  78. #define AES_BASE 0x44037000
  79. #define DES_BASE 0x44039000
  80. #endif // __HW_MEMMAP_H__