asm_thumb2_label_branch.rst 3.0 KB

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  1. Branch instructions
  2. ===================
  3. These cause execution to jump to a target location usually specified by a label (see the ``label``
  4. assembler directive). Conditional branches and the ``it`` and ``ite`` instructions test
  5. the Application Program Status Register (APSR) N (negative), Z (zero), C (carry) and V
  6. (overflow) flags to determine whether the branch should be executed.
  7. Most of the exposed assembler instructions (including move operations) set the flags but
  8. there are explicit comparison instructions to enable values to be tested.
  9. Further detail on the meaning of the condition flags is provided in the section
  10. describing comparison functions.
  11. Document conventions
  12. --------------------
  13. Notation: ``Rm`` denotes ARM registers R0-R15. ``LABEL`` denotes a label defined with the
  14. ``label()`` assembler directive. ``<condition>`` indicates one of the following condition
  15. specifiers:
  16. * eq Equal to (result was zero)
  17. * ne Not equal
  18. * cs Carry set
  19. * cc Carry clear
  20. * mi Minus (negative)
  21. * pl Plus (positive)
  22. * vs Overflow set
  23. * vc Overflow clear
  24. * hi > (unsigned comparison)
  25. * ls <= (unsigned comparison)
  26. * ge >= (signed comparison)
  27. * lt < (signed comparison)
  28. * gt > (signed comparison)
  29. * le <= (signed comparison)
  30. Branch to label
  31. ---------------
  32. * b(LABEL) Unconditional branch
  33. * beq(LABEL) branch if equal
  34. * bne(LABEL) branch if not equal
  35. * bge(LABEL) branch if greater than or equal
  36. * bgt(LABEL) branch if greater than
  37. * blt(LABEL) branch if less than (<) (signed)
  38. * ble(LABEL) branch if less than or equal to (<=) (signed)
  39. * bcs(LABEL) branch if carry flag is set
  40. * bcc(LABEL) branch if carry flag is clear
  41. * bmi(LABEL) branch if negative
  42. * bpl(LABEL) branch if positive
  43. * bvs(LABEL) branch if overflow flag set
  44. * bvc(LABEL) branch if overflow flag is clear
  45. * bhi(LABEL) branch if higher (unsigned)
  46. * bls(LABEL) branch if lower or equal (unsigned)
  47. Long branches
  48. -------------
  49. The code produced by the branch instructions listed above uses a fixed bit width to specify the
  50. branch destination, which is PC relative. Consequently in long programs where the
  51. branch instruction is remote from its destination the assembler will produce a "branch not in
  52. range" error. This can be overcome with the "wide" variants such as
  53. * beq\_w(LABEL) long branch if equal
  54. Wide branches use 4 bytes to encode the instruction (compared with 2 bytes for standard branch instructions).
  55. Subroutines (functions)
  56. -----------------------
  57. When entering a subroutine the processor stores the return address in register r14, also
  58. known as the link register (lr). Return to the instruction after the subroutine call is
  59. performed by updating the program counter (r15 or pc) from the link register, This
  60. process is handled by the following instructions.
  61. * bl(LABEL)
  62. Transfer execution to the instruction after ``LABEL`` storing the return address in
  63. the link register (r14).
  64. * bx(Rm) Branch to address specified by Rm.
  65. Typically ``bx(lr)`` is issued to return from a subroutine. For nested subroutines the
  66. link register of outer scopes must be saved (usually on the stack) before performing
  67. inner subroutine calls.